1. Field of the Invention
The present invention relates to a signal processor having an avalanche photodiode (hereafter abbreviated to an APD).
The APD has been increasingly developed as a photosensor for use with optical communications systems. Recently, applications in solid state image sensors have been also promoted.
Such an application is disclosed in prior art International Application No. WO91/02381 that was laid open in conformity with the Patent Cooperation Treaty.
2. Related Background Art
Solid state image sensors in particular have been developed remarkably in recent years. CCD type and MOS type solid state image sensors have already been utilized. However, the development of solid state image sensors exhibiting a much higher sensitivity and a still higher SN ratio is desired for applications to the signal processors of high-definition televisions and a wide variety of monitor cameras. Among image sensors, there is a carrier storage type avalanche multiplication solid state image sensor including an APD used as a light receiving element part that is promising in terms of having an increased SN ratio.
The carrier storage operation in the above-mentioned solid state image sensor involves the steps of setting an electrode at one terminal of the light receiving element in a floating state and reading the photo signal carriers stored therein for a constant period. When using the APD as this light receiving element, the sensitivity increases. However, voltages applied to both terminals of the APD are reduced by the storage of the photo signal carriers sufficient to change the strength of an intra-APD electric field. Concomitantly, the avalanche multiplication gain of the APD decreases. As a result, a favorable characteristic of an output signal versus the quantity of incident light i.e., the rectilinearity of the photoelectric conversion characteristic is lost.
One example of a structure proposed to obviate this problem is described on pp. 67-72, Television Association's Technological Report Vol. 11, No. 28. This solid state image sensor will be discussed with reference to FIGS. 1 and 2.
FIG. 1 is an equivalent circuit diagram of a conventional solid state image sensor. FIG. 2 is a diagram illustrating operating pulses and surface potentials in the conventional solid state image sensor.
Referring to FIG. 1, one pixel is constructed of an APD 401, a capacitor 402 and two MOS transistors 403, 404. Pulse signals G1, G2 shown in FIG. 2 are respectively applied to the MOS transistors 403, 404 from a vertical scanning circuit 405.
The operation of this image sensor will be explained with reference to the diagram showing the operating pulses and the surface potentials. To start with, as a reset operation, the same positive voltage is applied to gates of the MOS transistors 403, 404. As a result, the potentials under the gates are both reduced to a value of V.sub.g -V.sub.t. Carriers stored in the APD 401 and the capacitor 402 are swept away towards the drain. The surface potential of the APD 401 reaches a balance at V.sub.g -V.sub.t. (FIG. 2 (A)).
Next, if the MOS transistor 404 is turned OFF while applying the voltage V.sub.g to the gate of the MOS transistor 403, the APD 401 is brought into a carrier storage state while connected in parallel with the capacitor 402. Light is incident during this carrier storage period. Signal carriers that are avalanche-multiplied in the APD 401 are stored in two locations, i.e., the APD 401 and the capacitor 402. (FIG. 2 (B) ).
At the end of the storage period, the MOS transistor 403 is turned OFF (FIG. 2(C)). In this state, when the positive voltage V.sub.g is applied to the gate of the MOS transistor 404, the signal carriers stored in the capacitor 402 are read as output signal carriers to an outside circuit (FIG. 2(D)). Thereafter, those operations are repeated.
In the thus constructed solid state image sensor, the electrode of the APD that assumes the floating state during the carrier storage period is connected in parallel with the capacitor. The present inventors therefore expected that variations in the voltage applied to the APD would be reduced with an increase in the capacitance of the capacitor, the changes in the gain of avalanche multiplication of the APD would be decreased, and therefore the rectilinearity of the photoelectric conversion characteristics would be improved. According to the results of a good number of tests performed by the present inventors, however, the rectilinearity was, in fact, not sufficiently ameliorated even by adding a large capacitor.
FIG. 3 shows the photoelectric conversion characteristics of the conventional solid state image sensor. As obvious from FIG. 3, the improvement in the rectilinearity is not sufficient even when adding a capacitor having a capacitance that is several 10 times as large as the junction capacitance C.sub.APD (18 pF in this case) of the APD. Further, the addition of such an extremely large capacitor to each pixel is not desirable in terms of improving the resolution and obtaining a hyperfine structure.
The conventional examples have been fully explained so far by exemplifying the solid state image sensor. The problem of the deterioration of the rectilinearity due to the changes in the electric field strength is common to not only the image sensor but also the avalanche photodiode and the signal processor including this avalanche photodiode.